There is a semiconductor device wherein an electronic part is mounted across solder on a metal layer formed on an insulating substrate. With the semiconductor device, when mounting the electronic part on the metal layer across the solder, the solder flows toward the perimeter, and it may happen, for example, that the solder spreads as far as an edge of the metal layer, or that the solder spreads as far as a position in which another electronic part mounted on the metal layer is disposed.
When the solder spreads as far as an edge of the metal layer, high stress is applied to an insulating substrate in the vicinity of the edge of the metal layer when heat is applied, and there is a possibility of a crack occurring. Also, when the solder spreads as far as the position in which the other electronic part is disposed, there is a possibility of it affecting a junction of the other electronic part.
In response to this, in order to suppress the spreading of the solder, it is conceivable, for example, that a solder-repellent insulating film is formed on the metal layer around a position in which the electronic part is mounted, or that a slit is formed in the metal layer around the position in which the electronic part is mounted.
There exists, for example, a power semiconductor device wherein a power semiconductor element is joined by solder onto a metal pattern mounted on one principal surface of a heat sink across an insulating layer, and the metal pattern is separated by a solder mask into a power semiconductor element formation region and a wire relay region (for example, refer to Patent Document 1).
Also, there exists, for example, a multi-chip module substrate, which has a solder sealing region in which a sealing cover is soldered to a surface of an insulating material, wherein a metal layer is provided inside or outside the solder sealing region, and a zonal region of constant width in which there is no metal layer is formed into a closed loop in a boundary division between the solder sealing region and metal layer (for example, refer to Patent Document 2).